AIX 5L Performance Tools Handbook by IBM Redbooks

By IBM Redbooks

This IBM Redbook takes an insightful examine the functionality tracking and tuning instruments which are supplied with AIX 5L. It discusses using the instruments in addition to the translation of the implications in lots of examples.This booklet is intended as a reference for method directors and AIX technical help pros to allow them to use the functionality instruments successfully and interpret the outputs whilst examining AIX process performance.A normal proposal and advent to the instruments is gifted to introduce the reader to the method of AIX functionality analysis.The person functionality instruments mentioned during this ebook fall into those categories:- Multi-resource tracking and tuning instruments- CPU-related functionality instruments- Memory-related functionality instruments- Disk I/O-related functionality instruments- Network-related functionality instruments- functionality tracing instruments- extra functionality subject matters, together with functionality tracking API, Workload supervisor instruments, and function toolbox for AIX.

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Physical disk buffers The Logical Volume Manager (LVM) uses a construct called a pbuf to control a pending disk I/O. A single pbuf is used for each I/O request, regardless of the number of pages involved. AIX creates extra pbufs when a new physical volume is added to the system. When striping is used, you need more pbufs because one I/O operation causes I/O operations to more disks and, therefore, more pbufs. When striping and mirroring is used, even more pbufs are required. Running out of pbufs reduces performance considerably because the I/O process is suspended until pbufs are available again.

The processors are “snooping” on the bus, and if they receive a broadcast message about a modified word in the cache of another processor, they need to verify if they hold this changed address in their cache. If they do, they invalidate this entry in their cache. The broadcast messages increases the load on the bus, and invalidated cache entries increase the number of cache misses. Both reduce the theoretical overall system performance, but hardware systems are designed to minimize the impact of the cache coherency mechanism.

Processor affinity If a thread is running on a CPU and gets interrupted and redispatched, the thread is placed back on the same CPU (if possible) because the processor’s cache may still have lines that belong to the thread. If it is dispatched to a different CPU, the thread may have to get its information from main memory. Alternatively, it can wait until the CPU where it was previously running is available, which may result in a long delay. Chapter 1. Introduction to AIX performance monitoring and tuning 7 AIX automatically tries to encourage processor affinity by having one run queue per CPU.

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